With the progress of modern technologies, the coming of information era, and the prosperous development of network, various electronic products are developed for satisfying people's demand. The functions of the electronic products are becoming powerful and complete increasingly, and thus bringing convenience for people's lives. All of the current electronic products pursue miniaturization and are fastidious about lightness and thinness. Under high-density packaging, the size of the required electronic devices is becoming relatively smaller, particularly for radio-frequency integrated circuits (RFICs) applied in portable wireless communication electronic products.
Currently, for increasingly demanded RFICs, the most urgent need is not on enhancing the efficiency of active devices but on improving the characteristics of passive devices such as resistors, capacitors, and inductors. For modern semiconductor process technologies, it is not a problem to provide superior resistors and capacitors that are easy to be implemented and simulated. However, for passive inductors, the only choice is spiral inductors. The inductance of spiral inductors depends strongly on the semiconductor process adopted to fabricate them. The method for increasing the inductance of an on-chip inductor is mostly to increase the number of turns of the inductor, which will increase the occupied area, and hence is unfavorable for miniaturization of the on-chip inductor. Thereby, how to increase effectively the inductance is still a major issue for developing the on-chip inductor. In addition, the Q factor (quality factor) of the inductor will also reduce owing to substrate loss.
Accordingly, the present invention provides an on-chip inductor structure and a method for manufacturing the same for solving the problems described above. According to the present invention, the drawbacks according to the prior art as described above can be improved; the inductance can be increased; the area can be reduced; and the manufacturing cost can be lowered.